Toward Fault-Tolerant Applications on Reconfigurable Systems-on-Chip

FPGAs have become a well-established solution for systems aiming for high performance and flexibility. FPGA-based SoCs have facilitated the integration of software programmability and custom hardware acceleration. The sensitivity to disturbance, the scarcity of CAD tools dedicated to evaluating robustness, and the drastic increase in on-chip components pose challenges to analyzing and assessing the reliability of reconfigurable systems in safety-critical domains. The current work proposes methodologies for accurate and efficient robustness analysis of Reconfigurable SoCs. It focuses on the heterogeneous components and modules embedded in Reconfigurable SoCs, such as soft and hard processors, host-device interfacing systems, and custom hardware accelerators. The research explores and provides the methodology and practical tools for developing and evaluating reliable applications on Reconfigurable SoCs, enabling detailed analyses of systems and their components.