The hardware implementation of QARMA-64 with RoCC on FPGA for memory encryption

This paper proposes a hardware accelerator for the lightweight encryption cipher QARMA-64, integrated into the RISC-V Rocket Chip using the Rocket Custom Coprocessor (RoCC). The accelerator achieves significant performance gains, with encryption speedup of 106x and decryption speedup of 98x compared to software. FPGA utilization on the Xilinx VC707 Evaluation board shows only a modest increase of 3.64% in Look-Up Tables (LUTs) and 0.82% in Flip-Flops (FFs) relative to the base Rocket Chip design.