Visuals on the House: Optimizing HPC Workflows with No-Cost CPU Visualization

The rise of heterogeneous resources in modern High Performance Computing (HPC) systems has propelled the scientific community beyond the exascale threshold. To maximize simulation performance on HPCs, applications increasingly rely on device resources, such as GPUs, leading to under-utilization of host resources, partic-ularly CPUs. In situ analysis and visualization techniques minimize data movement by operating on data in-memory, but this still in-volves blocking operations that incur a small penalty on simulation performance. We explore a novel instrumentation approach where GPU-based time step data is copied from device memory to host memory, enabling CPUs to concurrently perform visualization and analysis tasks. This strategy allows simulations to continue uninter-rupted by an in situ library's analysis and visualization processes.

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Published
2024-10-13
DOI
https://doi.org/10.1109/ldav64567.2024.00016
Primary Topic
Distributed and Parallel Computing Systems
Type
article
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article

Visuals on the House: Optimizing HPC Workflows with No-Cost CPU Visualization

Steve Petruzza, Michael E. Papka, Ananias Tomboulides, Silvio Rizzi et al.
Distributed and Parallel Computing Systems
article

Visuals on the House: Optimizing HPC Workflows with No-Cost CPU Visualization

Steve Petruzza, Michael E. Papka, Ananias Tomboulides, Silvio Rizzi, Misun Min, Victor A. Mateevitsi, Mathis Bode, Jens Henrik Göbbert, Paul Fischer, Yu-Hsiang Lan, Joseph A. Insley, Dimitrios Papageorgiou, Andres Sewell, Ioannis Kavroulakis, Damaskinos Konioris
article en

Abstract

The rise of heterogeneous resources in modern High Performance Computing (HPC) systems has propelled the scientific community beyond the exascale threshold. To maximize simulation performance on HPCs, applications increasingly rely on device resources, such as GPUs, leading to under-utilization of host resources, partic-ularly CPUs. In situ analysis and visualization techniques minimize data movement by operating on data in-memory, but this still in-volves blocking operations that incur a small penalty on simulation performance. We explore a novel instrumentation approach where GPU-based time step data is copied from device memory to host memory, enabling CPUs to concurrently perform visualization and analysis tasks. This strategy allows simulations to continue uninter-rupted by an in situ library's analysis and visualization processes.

Utah State University (US), Argonne National Laboratory (US), University of Illinois Urbana-Champaign (US), Aristotle University of Thessaloniki (GR)
Affordable and clean energy
Openalex Percentile: Top 75%
Distributed and Parallel Computing Systems
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Visuals on the House: Optimizing HPC Workflows with No-Cost CPU Visualization — Steve Petruzza, Michael E. Papka, et al. · (2024) | TGRS Research Map | TGRS