Design-for-Test for Silicon Photonic Circuits

This paper proposes a design-for-test (DFT) methodology and architecture for testing and validation of silicon photonic integrated circuits (PICs). We describe the design of silicon photonic circuits and components that comprise the proposed DFT architecture. The designs are extensively simulated and validated as test-access and fault-detection circuitry. We demonstrate how the DFT approach can be deployed on photonic integrated circuits and how they can be tested for correct operation, in terms of signal power and phase. The application is demonstrated on two distinct types of designs – an optical neural network comprising optical devices in a feed-forward topology, and an optical logic circuit with feedback loops.