A Ku-Band Fully Differential Low-Power High-Input P1dB Low-Noise Amplifier

This paper introduces a Ku-band fully differential low-power high-input 1 dB compression point (P1dB) low-noise amplifier (LNA). A fully differential structure is employed to enhance the input P1dB, common-mode noise rejection, and second harmonic cancellation. The first stage adopts large transistors and is optimized for power consumption and noise figure (NF). The output stage is designed with class AB bias, resulting in improved P1dB, power consumption, and linearity. The proposed two-stage fully differential common-source (CS) LNA was implemented using 65 nm bulk complementary metal oxide semiconductor (CMOS) technology. The fabricated LNA achieved a minimum NF of 2.7 dB at 13.6 GHz. Furthermore, it achieved a maximum gain of 19.92 dB at 12.2 GHz. Additionally, the LNA has an input P1dB of -7.45 dBm and an output power 1 dB compression point (OP1dB) of 10.09 dBm, both measured at 15.6 GHz. The LNA operates with a power consumption of 11 mW at a 1 V supply, and occupies a core size of 0.75 mm × 0.35 mm.

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Publication Details

Journal
Nanomaterials
Published
2024-11-28
DOI
https://doi.org/10.3390/nano14231913
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.00

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article

A Ku-Band Fully Differential Low-Power High-Input P1dB Low-Noise Amplifier

Choul‐Young Kim, Joon‐Hyung Kim, Min-Seok Baek, Sang-Rok Lee
Nanomaterials
Radio Frequency Integrated Circuit Design
article

A Ku-Band Fully Differential Low-Power High-Input P1dB Low-Noise Amplifier

Choul‐Young Kim, Joon‐Hyung Kim, Min-Seok Baek, Sang-Rok Lee
article en

Abstract

This paper introduces a Ku-band fully differential low-power high-input 1 dB compression point (P1dB) low-noise amplifier (LNA). A fully differential structure is employed to enhance the input P1dB, common-mode noise rejection, and second harmonic cancellation. The first stage adopts large transistors and is optimized for power consumption and noise figure (NF). The output stage is designed with class AB bias, resulting in improved P1dB, power consumption, and linearity. The proposed two-stage fully differential common-source (CS) LNA was implemented using 65 nm bulk complementary metal oxide semiconductor (CMOS) technology. The fabricated LNA achieved a minimum NF of 2.7 dB at 13.6 GHz. Furthermore, it achieved a maximum gain of 19.92 dB at 12.2 GHz. Additionally, the LNA has an input P1dB of -7.45 dBm and an output power 1 dB compression point (OP1dB) of 10.09 dBm, both measured at 15.6 GHz. The LNA operates with a power consumption of 11 mW at a 1 V supply, and occupies a core size of 0.75 mm × 0.35 mm.

NanomaterialsVol. 14(23)
Chungnam National University (KR), Korea Aerospace Research Institute (KR)
Ministry of Trade, Industry and Energy, Iran Telecommunication Research Center, Ministry of Science and ICT, South Korea, Institute for Information and Communications Technology Promotion
Affordable and clean energy
Openalex Percentile: Top 81%
Radio Frequency Integrated Circuit Design
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