CSA-CiM: Enhancing Multifunctional Computing-in-Memory With Configurable Sense Amplifiers
Computing-in-memory (CiM) effectively alleviates the memory wall problem faced by traditional von Neumann architectures when handling data-intensive applications. Most CiM arrays employ dedicated sense amplifiers (SAs) to perform specific functions, and prior configurable CiM arrays achieve multifunctionality by stacking multiple SAs with corresponding functions. However, the independent nature of these SAs, particularly the analog-to-digital converter (ADC), results in excessive energy and area consumption. In this article, we propose a configurable multifunctional ferroelectric field effect transistor (FeFET)-based CiM array design, including configurable peripheral circuit with corresponding multifunctionalities and reusable SA components, to reduce energy consumption and latency. The array cells perform logical AND and XNOR operations, and the proposed SA can be configured to operate in either ADC or winner-take-all (WTA) modes, thereby enabling the array to implement both multiplication-accumulation (MAC) and associative search operations. Instead of operating independently, the WTA component within the SA participates as a flash stage in successive approximation register (SAR) conversions in ADC mode, thus enhancing the WTA utilization, energy efficiency and compactness. By integrating the multifunctional CiM array and the configurable SA, our design supports MAC, Hamming-distance computation (HDC), and nearest neighbor search (NNS) operations within the same structure. Compared to existing works, our design achieves energy efficiency improvements of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$7.2\times $ </tex-math></inline-formula> for MAC, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.9\times $ </tex-math></inline-formula> for HDC, and EDP improvement of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$6.4\times $ </tex-math></inline-formula> for NNS, respectively.
Authors
- Cheng Zhuo (ORCID: https://orcid.org/0000-0002-2610-7522)
- Xunzhao Yin (ORCID: https://orcid.org/0000-0003-4656-9545)
- Kai Ni (ORCID: https://orcid.org/0000-0002-3628-3431)
- Thomas Kämpfe (ORCID: https://orcid.org/0000-0002-4672-8676)
- Yan Zhang (ORCID: https://orcid.org/0000-0002-5722-879X)
- Yuxiao Jiang (ORCID: https://orcid.org/0009-0006-0425-291X)
Institutions
- University of Notre Dame (US)
- Fraunhofer Institute for Photonic Microsystems (DE)
- Zhejiang University (CN)
Publication Details
- Journal
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Published
- 2024-11-27
- DOI
- https://doi.org/10.1109/tcad.2024.3506864
- Citations
- 4
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.83