Parallel MRI accelerator: The MPSoC design for real time image reconstruction

Motivation: Real-time MRI requires efficient data acquisition and low latency image reconstruction along high temporal resolution. The pMRI method known as GRAPPA, offers advantage in terms of fast data acquisition. Goal(s): However, large computational requirements of GRAPPA limit its performance in real-time clinical settings. Approach: This paper presents a novel MPSoC based hardware accelerator which combines 32-bit FPGA based accelerator module with multiple DSP engines and on-chip ARM processor, to provide sufficient computational resources for GRAPPA. Results: The results using in-vivo cardiac datasets i.e. 18-receiver coils, show that the proposed accelerator reconstructs cardiac images at ∼35 frames-per-second without degrading the image quality. Impact: The proposed accelerator is capable to reconstruct 35 frames in one second as compared to the CPU-based counterparts which can only reconstruct 2 frames/second for a given GRAPPA reconstruction setting in our experiments.