A SET‐tolerant StrongARM comparator with improved performance

Abstract In this paper, a radiation hardened by design StrongARM comparator is proposed to mitigate the radiation effects. With 12 additional transistors compared to the conventional one, the proposed structure shows much higher immunity to single‐event transients. During the amplification phase, when the input differential voltage is 10 mV, the proposed structure can withstand up to 18fC free charge, 45x far surpassing the conventional structure. During the regeneration phase, every sensitive node in the proposed structure can withstand a 200 fC‐injected charge. Compared to other redundant structures with performance deterioration, the proposed architecture exhibits high‐speed characteristics. When the differential voltage between two inputs is 1 mV, the delay of the new structure is 168.26 ps and the speed improvement is 118.02% over the conventional structure.