Subthreshold Swing Modeling Down to Cryogenic Temperatures for MOSFET Compact Models

In this article, we present a method to analytically model the subthreshold swing (SS) in bulk MOSFET compact models down to cryogenic temperatures by incorporating interface states into the surface potential equation (SPE). The impact of the interface states is captured by a gate voltage shift. To derive a close-form solution, the shift is first calculated for the actively charging region of the gate voltage using a linear approximation of the interface states. The shift is then smoothly clamped to zero at lower gate voltages, where the interface states are empty, and to a saturated value at higher gate voltages, where the interface states are fully charged. This approach differs from the empirical or behavioral methods typically used in compact models. The method effectively models the SS and its saturation at cryogenic temperatures and has been validated with measurement data down to 4.2 K in an n-channel Si MOSFET from a 28-nm bulk CMOS process for both linear and saturation regions. This method does not account for the band-tail effect, and self-heating is not considered, as it is negligible in the subthreshold region. The approach is straightforward and can be easily applied to other types of MOSFETs.

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Publication Details

Journal
IEEE Transactions on Electron Devices
Published
2024-11-26
DOI
https://doi.org/10.1109/ted.2024.3499934
Citations
1
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.21
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article

Subthreshold Swing Modeling Down to Cryogenic Temperatures for MOSFET Compact Models

Kejun Xia
1 citations
IEEE Transactions on Electron Devices
Advancements in Semiconductor Devices and Circuit Design
0.21
article

Subthreshold Swing Modeling Down to Cryogenic Temperatures for MOSFET Compact Models

Kejun Xia
article en
1 citations

Abstract

In this article, we present a method to analytically model the subthreshold swing (SS) in bulk MOSFET compact models down to cryogenic temperatures by incorporating interface states into the surface potential equation (SPE). The impact of the interface states is captured by a gate voltage shift. To derive a close-form solution, the shift is first calculated for the actively charging region of the gate voltage using a linear approximation of the interface states. The shift is then smoothly clamped to zero at lower gate voltages, where the interface states are empty, and to a saturated value at higher gate voltages, where the interface states are fully charged. This approach differs from the empirical or behavioral methods typically used in compact models. The method effectively models the SS and its saturation at cryogenic temperatures and has been validated with measurement data down to 4.2 K in an n-channel Si MOSFET from a 28-nm bulk CMOS process for both linear and saturation regions. This method does not account for the band-tail effect, and self-heating is not considered, as it is negligible in the subthreshold region. The approach is straightforward and can be easily applied to other types of MOSFETs.

IEEE Transactions on Electron DevicesVol. 72(1)
Taiwan Semiconductor Manufacturing Company (Taiwan) (TW)
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Advancements in Semiconductor Devices and Circuit Design
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