An Instruction-Set Extension to Support Approximate Multicore Processors

Approximate computing encompasses several techniques that can be applied from the application level to the circuit level, offering better performance and lower power consumption at the cost of a lack of precision. Multicore architectures, by distributing the workload among several processing cores, can meet the demand for performance while remaining within the energy limitations. This work focuses on the usage of heterogeneous multicore designs, comprised of approximate cores. Specifically, this paper proposes an extension to RISC-V Instruction-Set Architecture (ISA) that supports approximate operations. We have designed a sub-set of approximate integer and floating point instructions that, in turn, are embedded in the operations of mathematical functions (sine, cosine, tangent, exponential, and logarithmic). The proposed technique is named Instruction-Level Approximate Functions (ILAF) and it has been evaluated on accuracy, number of instructions, cycles, and power in six applications using the ACCEPT compiler framework and the SPIKE RISC-V simulator. We have performed experiments comparing our approach to non-approximate and approximate versions of each application. The results show significant improvements, such as a 94.18% reduction in power consumption in the CUBIC application and 78.39% cycles reduction in the IDENTITY_LOG2 application. Additionally, a detailed and comprehensive analysis of ILAF and a software-based approximate technique (FastApprox) in the BLACKSCHOLE application showed that ILAF achieved a reduction in power consumption of 3.02× with 19% code coverage.