Fabrication tolerance modeling of silicon-on-insulator-based 8 × 8 double-layer network architecture using hybrid photonic switches for crosstalk optimization

We designed an 8×8 double-layer photonic network (DLPN) using ring-assisted directional coupler (RADC) switches to minimize crosstalk and accommodate fabrication errors. The RADC photonic switch was realized in a silicon-on-insulator (SOI) platform with enhanced optical confinement using the finite difference time domain method. Electro-optic tuning was achieved by injecting carriers across the P-i-N junction. Our proposed RADC switches have a 5% fabrication tolerance on waveguide dimensions, resulting in optimized crosstalk performance. A comparative study of ring-assisted Mach Zehnder interferometer switches and the proposed RADC switches was conducted in the DLPN architecture, considering various performance metrics such as extinction ratio, free spectral range, quality factor, finesse, crosstalk, and insertion loss. The proposed RADC switches achieved a 35% footprint reduction and crosstalk reduction (−20.71 to −35.07 dB) in waveguide crossings within the double-layer architecture.