A Structural Impact Study and Process Optimization of FinFET Parasitic Capacitance

While excelling in device density and driving capability, the fin field-effect transistor (FinFET) development has highlighted the increasing impact of parasitic capacitance on high-frequency performance. Here, we report a comprehensive impact study of FinFET structures and key process on the parasitic capacitance, particularly the gate-source/drain (S/D) capacitance (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C} _{\text {G-SD}}$ </tex-math></inline-formula>). By TCAD simulation, the optimal structural parameters of the fin and S/D geometry have been identified with improved dc performance as well as <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C} _{\text {G-SD}}$ </tex-math></inline-formula> characteristics. The parasitic <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C} _{\text {G-SD}}$ </tex-math></inline-formula> is further suppressed by optimized high-k/metal gate (HKMG) critical process steps. Enhanced ac performance is experimentally achieved realizing over 20% improvement in cutoff frequency (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f} _{\text {T}}$ </tex-math></inline-formula>) and maximum oscillation frequency (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f} _{\max }$ </tex-math></inline-formula>) as compared to baseline (320.4-GHz <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f} _{\text {T}}$ </tex-math></inline-formula> and 362.2-GHz <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f} _{\max }$ </tex-math></inline-formula> for nMOS and 393-GHz <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f} _{\text {T}}$ </tex-math></inline-formula> and 168-GHz <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f} _{\max }$ </tex-math></inline-formula> for pMOS). The results demonstrate practical potential in both device-level and circuit-level engineering toward advanced FinFET-based high-frequency applications.