Demonstration of a Ternary Inverter Based on the Novel TDDFET With Dual-Doped Source and Asymmetric Gates

In this paper, a novel tunneling-drift-diffusion field-effect transistor (TDDFET) is introduced with dual-doped source and asymmetric gates. In the TDDFET, the current is conducted by two mechanisms, namely the band-to-band tunneling and drift-diffusion, making the device can present an additional state between the on and off states, and very suitable for the ternary logic design. Additionally, a standard ternary inverter (STI) is also implemented based on the TDDFET and studied in detail by the aid of TCAD simulation. It turns out that the supply voltage V<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> shows significant influence on the ternary inverter and the optimized value is about 3V<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">turn</sub>/2 in which V<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">turn</sub> is the transition voltage on the transfer curve. The influence of key device parameters are also studied in detail. Compared with other ternary inverters, our designed ternary inverter requiring no any immature material, passive device and multi-valued power supply, is more friendly with the CMOS platform and can make the most of the advantages of the ternary logic.