<i>H</i> _∞ Anti-Disturbance Bumpless Transfer Control for Switched Affine Systems With Its Application to a Circuit Model

This brief concentrates on the problem of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$H_{\infty }$ </tex-math></inline-formula> anti-disturbance bumpless transfer control (ADBTC) of switched affine systems (SASs) with multiple types of disturbances. The <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$H_{\infty }$ </tex-math></inline-formula> ADBTC strategy is put forward to achieve the bumpless transfer (BT) performance and the anti-disturbance performance, simultaneously. First, a more general switched affine disturbance observer is designed to estimate the external disturbances generated from the external SASs. Secondly, a novel BT performance constraint containing the system state, the disturbance observer state, and the affine terms is proposed to suppress the control bumps. Thirdly, a switched anti-disturbance BT controller and a state-dependent switching law are constructed. Then a solvable condition for the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$H_{\infty }$ </tex-math></inline-formula> ADBTC problem of SASs is derived. Finally, the proposed control scheme is validated by an example of a circuit model.