Back‐Bias Effects in a SiGe Nanosheet Transistor with Multiple Independent Gates

Abstract Silicon germanium presents a great opportunity to improve the performance of Schottky barrier transistors through band gap engineering. This work presents a multi‐gated reconfigurable transistor built from pure SiGe channel material for bandgap reduction. The device utilizes industrial‐grade SiGe‐on‐insulator wafers, a hysteresis‐free HfO 2 ‐based dielectric, and alloyed NiTiGeSi contacts, leading to Fermi‐level pinning of the Schottky contact about 200 meV above the valance band. Electron and hole transport in this complex structure have been analyzed as a function of the applied back‐bias by electrical measurements and corresponding technology computer‐aided design simulation. An on/off ratio of 10 3 with on‐currents up to 3.15 µA can be achieved for the p‐mode. At the same bias, the n‐mode showed no influence of the top gates due to a dominant parasitic hole current path. A strong positive back‐bias induced an n‐type switching operation, resulting in similar on/off‐ratio and subthreshold slopes as achieved with the p‐type mode. Opposed to this, it is shown that a strong negative back‐bias leads to a loss of gate control over the p‐mode, inducing an always‐on behavior. The results will give guidelines for applying Schottky barrier devices in industrial SiGe technologies, e.g., for reconfigurable or cryogenic computing.