Design of logic circuits on 5 nm MOS

Abstract In this research, MOSFET, CMOSFET of gate length 5 nm has been presented. The simulation at gate length of 5 nm has been conducted using three different semiconductor materials which are SiGe, InGaAs and GaN. The comparison among their performance at MOSFET level has been showcased which reveals the better performance of InGaAs among the three different semiconductor candidates which is functioning at threshold voltage of 0.3804 V, drive current of 4.431 × 10 −06 A μm −1 and low leakage current of 7.696 × 10 −11 A μm −1 respectively. The comparison with the existing MOSFETs have been carried out and validated with ITRS 2013 and IRDS 2020 respectively. In order to design 2 input AND, OR, XOR, XNOR, NAND, NOR and NOT gate circuits, the CMOSFET at 5 nm gate length has been utilised and their performance in terms of Average power, Propagation delay, Power delay product and noise margin analysis are furnished in this paper. A comparison among the proposed work with the existing reveals the lower power consumption, delay and the power delay product of the proposed work.