High-speed Interconnect Design of Silicon Interposer based Heterogeneous Integration for AI Computing

In this paper, signal integrity (SI) design and analysis of high-speed interconnect of silicon interposer based heterogeneous integration for artificial intelligence (AI) computing was carried out. With the increasing popularity of AI services, there has been a significant surge in the demand for AI computing capabilities. As a result, high-performance, high-density AI computing modules based on multi-GPU architectures, rather than single-GPU configurations, have emerged as a prominent solution. For high-density GPU integration, the silicon interposer based heterogeneous integration of multi-GPU architecture is arisen. In this research, we design multi-GPU integration on silicon interposer and high-speed GPU links considering routability. Furthermore, we analyzed the designed high-speed GPU link considering SI, but also fabrication cost. Consequently, multiple GPUs are integrated on a silicon interposer, but it has been determined that adequate SI for GPU links cannot be secured on the interposer. Instead, utilizing a package for these connections ensures the necessary SI and offers significant advantages in fabrication cost with reducing metal layers of silicon interposer.