A Soft Startup Method With Natural Short-Circuit Tolerance Features for CLLC Converters
The <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CLLC</i> converter is a high-frequency, high-efficiency isolated bidirectional dc–dc converter. In outdoor application scenarios like electric vehicle fast charging station, short-circuit failure caused by harsh environments is very challenging for the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CLLC</i> converter. Especially, such short-circuit failure is more likely occurring in startup stage. In this article, a soft startup method with natural short-circuit tolerance features is proposed for <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CLLC</i> converters. A special fixed frequency fixed duty cycle driving scheme is designed and used for realizing soft startup. An operation mode analysis is conducted for proposed soft startup driving scheme, showing its detailed working process and energy transmission characteristics. Besides, a practical startup method using proposed soft startup driving scheme is also illustrated. To clarify the mechanism of natural short-circuit fault tolerance features in the proposed method, a comprehensive dynamic state trajectory analysis is provided, showing that the dynamic state trajectory after short-circuit failure can be restricted within a boundary automatically. As a result, very large short-circuit current is avoided and natural short-circuit tolerance features is realized. Finally, a lab-level prototype is built to verify the proposed method and the corresponding analysis. Experimental results proves that the proposed method achieves excellent short-circuit tolerance performance (short-circuit current is less than 4% of that in conventional method) and similar soft startup performance compared to the conventional method.
Authors
- Leheng Wang (ORCID: https://orcid.org/0000-0002-8273-9807)
- Kai Sun (ORCID: https://orcid.org/0000-0003-3443-4061)
- Yongdong Li (ORCID: https://orcid.org/0000-0002-3311-144X)
- Huan Chen (ORCID: https://orcid.org/0009-0002-0829-398X)
- Kai Zhang (ORCID: https://orcid.org/0000-0001-6818-377X)
Institutions
- Tsinghua University (CN)
Publication Details
- Journal
- IEEE Transactions on Power Electronics
- Published
- 2024-11-21
- DOI
- https://doi.org/10.1109/tpel.2024.3503555
- Citations
- 5
- Primary Topic
- Low-power high-performance VLSI design
- Type
- article
- Field-Weighted Citation Impact
- 1.04