An Efficient Machine Learning Approach for PSIJ Analysis in a Chain of CMOS Inverters
In this paper, an efficient machine learning approach based on the knowledge-based and recurrent neural networks to predict power supply induced jitter in the presence of multiple power supply noises is presented. The proposed approach provides a reasonable accuracy and a significant increase in speed compared to conventional approaches.
Authors
- Ahsan Javaid (ORCID: https://orcid.org/0000-0003-1357-1606)
- Jai Narayan Tripathi (ORCID: https://orcid.org/0000-0001-9109-2948)
- Ramachandra Achar (ORCID: https://orcid.org/0000-0002-2822-3674)
Institutions
- Indian Institute of Technology Jodhpur (IN)
- Carleton University (CA)
Publication Details
- Published
- 2024-10-06
- DOI
- https://doi.org/10.1109/epeps61853.2024.10754066
- Citations
- 2
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 0.98