Application of CAMM2 Connector on PCIe Gen 6.0 SSD Host Interface for Low Near-End Crosstalk
The M.2 connector has been widely adopted in the host interface of client Solid State Drives (SSDs) for high-speed data storage in consumer electronics. The pin arrangement of the M.2 connector, where transmitter (TX) and receiver (RX) lines are positioned adj acent, can lead to issues such as near-end crosstalk (NEXT). Particularly, with the upcoming PCI Express (PCIe) Gen 6.0 standard, concerns arise over the potential degradation of NEXT in M.2 connectors, which could negatively affect SSD performance and reliability. This paper analyzes the signal integrity (SI) requirements for connectors to ensure the host interface of SSDs operates reliably at PCIe Gen 6.0 speed. We investigate whether the NEXT in existing M.2 form factors for client SSDs meets these requirements and experimentally examine its impact on PCIe Gen 6.0 64 Gb/s PAM-4 eye diagram at the system level. Furthermore, by applying Compression Attached Memory Module 2 (CAMM2) to the SSD PCIe interfaces, we experimentally demonstrate the capability to reduce NEXT by over 50 % compared to M.2 and limit PAM-4 eye degradation to less than 1 %. This illustrates how CAMM2 connector can overcome the limitations of M.2 connector and enhance performance in PCIe Gen 6.0.
Authors
- Young-Jun Ko
- Seokwoo Hong (ORCID: https://orcid.org/0000-0002-2232-5039)
- Chorom Jang (ORCID: https://orcid.org/0000-0002-3400-1867)
- Dong-Ho Choi (ORCID: https://orcid.org/0000-0001-5829-2892)
- Sungwoo Jin
- Kyung–Suk Kim (ORCID: https://orcid.org/0000-0003-0681-346X)
- S. D. Roh
- Jinwook Song (ORCID: https://orcid.org/0000-0002-9921-5241)
- Hyunwoo Kim (ORCID: https://orcid.org/0000-0003-4121-1851)
- Sunghoon Chun
Institutions
- Samsung (South Korea) (KR)
Publication Details
- Published
- 2024-10-06
- DOI
- https://doi.org/10.1109/epeps61853.2024.10754183
- Primary Topic
- Advanced Data Storage Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00