Design of a Digital RISC-V ASIC Using an Open-Source Software and Domestic Standard Cell Libraries

In this article physical design flow of digital integrated circuits based on domestic standard cell library with an open-source software is considered. The main difficulties encountered in the interaction of the open-source software and the standard cell library are considered. The proposed ways of solving these difficulties are tested by carrying out logical synthesis and place-and-route for the three RISC-V microprocessor cores: «Ibex», «SweRV» and «SCR1».