Compensation’s Method of Collector Load’s Parasitic Components in SiGe and SOI Cascode Amplifiers Operating at High Temperatures
This paper considers the circuit method for neutralizing the effect of parasitic components of the collector load in silicon-germanium (SiGe) and silicon-on-insulator (SOI) classical cascade amplifiers and common-base stages on their voltage gain (Gain). The article demonstrates that the incorporation of a dedicated compensating circuit into the original circuits enables the enhancement of their upper frequency limit or gain by a factor of 5 to 10. The conditions for mitigating the impact of resistor parasites, which contribute to losses in planar inductance, on the Q-factor of the RLC-circuit of the selective amplifier are established. It is recommended that the proposed circuit solutions be employed in practical applications involving SiGe and SOI analog chips operating at elevated temperatures.
Authors
- Yu. I. Ivanov (ORCID: https://orcid.org/0000-0003-1699-6706)
- Anna V. Bugakova (ORCID: https://orcid.org/0000-0001-9255-0015)
- Надежда Алексеевна Дмитриенко (ORCID: https://orcid.org/0000-0002-5222-4976)
- Ilya V. Frolov
Institutions
- Southern Federal University (RU)
- Don State Technical University (RU)
- Kotelnikov Institute of Radioengineering and Electronics of the Russian Academy of Sciences (RU)
Publication Details
- Published
- 2024-10-17
- DOI
- https://doi.org/10.1109/eexpolytech62224.2024.10755707
- Primary Topic
- Semiconductor Quantum Structures and Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Russian Science Foundation