PMSM Power-Hardware-in-the-Loop Emulation using LCL coupling network

The adoption of Power Hardware in the Loop (PHIL) has been appearing has an enhanced technic to test and validate control algorithms for electrical machines. It uses the advantages of hardware testing and simulation by interfacing the Device Under Test (DUT) hardware with numerical simulations. This paper presents the use of the PHIL for the emulation of a Permanent Magnet Synchronous Machine (PMSM) using a LCL coupling network with a RLC damping circuit. The modeling and derivation of the equations for the emulation and the proposed control structure are presented in detail. The paper shows that the inductance that represents the machine inductance in the PHIL system can be of a different value from the one of the machine. The theoretical work is supported and validated through experimental results, confirming the fairness and advantages of the proposed approach.