Real-Time Distributed Strain Sensing Using FPGA-Based Optical Frequency Domain Reflectometry

A real-time and high spatial resolution optical frequency domain reflectometry (OFDR) distributed strain sensing system that entirely employs a field-programmable gate array (FPGA) for data acquisition and cross-correlation shift calculation was demonstrated. The key factors in achieving real-time OFDR are the use of 2-D fast Fourier transform (2D-FFT) and a parallel computing framework designed using DDR4. The effect of the total data size and the number of padded zeros on the FPGA processing time is studied. Compared to the serial computing of 1436 ms with a central processing unit (CPU), the processing time is reduced to 67 ms using FPGA, enhancing nearly 20 times. The two-point spatial resolution is 0.07 mm when the total data size is 4 MS. The strain standard deviation is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3.49~\mu \varepsilon $ </tex-math></inline-formula> with a processing time of 268 ms using the proposed FPGA-based OFDR when the total data size is 1 MS and the sliding window is padded with zero to 8192.

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Publication Details

Journal
IEEE Transactions on Instrumentation and Measurement
Published
2024-11-20
DOI
https://doi.org/10.1109/tim.2024.3502767
Citations
1
Primary Topic
Advanced Fiber Optic Sensors
Type
article
Field-Weighted Citation Impact
0.21

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Real-Time Distributed Strain Sensing Using FPGA-Based Optical Frequency Domain Reflectometry

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article

Real-Time Distributed Strain Sensing Using FPGA-Based Optical Frequency Domain Reflectometry

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article en
1 citations

Abstract

A real-time and high spatial resolution optical frequency domain reflectometry (OFDR) distributed strain sensing system that entirely employs a field-programmable gate array (FPGA) for data acquisition and cross-correlation shift calculation was demonstrated. The key factors in achieving real-time OFDR are the use of 2-D fast Fourier transform (2D-FFT) and a parallel computing framework designed using DDR4. The effect of the total data size and the number of padded zeros on the FPGA processing time is studied. Compared to the serial computing of 1436 ms with a central processing unit (CPU), the processing time is reduced to 67 ms using FPGA, enhancing nearly 20 times. The two-point spatial resolution is 0.07 mm when the total data size is 4 MS. The strain standard deviation is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3.49~\mu \varepsilon $ </tex-math></inline-formula> with a processing time of 268 ms using the proposed FPGA-based OFDR when the total data size is 1 MS and the sliding window is padded with zero to 8192.

IEEE Transactions on Instrumentation and MeasurementVol. 74
Shenzhen University (CN), China Nonferrous Metal Mining (China) (CN)
National Natural Science Foundation of China, China Postdoctoral Science Foundation
Affordable and clean energy
Openalex Percentile: Top 46%
Advanced Fiber Optic Sensors
0.21
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