Deep Learning-Based Performance Testing for Analog Integrated Circuits

In this brief, we propose a deep learning-based performance testing framework to minimize the number of required test modules while guaranteeing the accuracy requirement, where a test module corresponds to a combination of one circuit and one stimulus. First, we apply a deep neural network (DNN) to establish the mapping from the response of the circuit under test (CUT) in each module to all specifications to be tested. Then, the required test modules are selected by solving a 0–1 integer programming problem. Finally, the predictions from the selected test modules are combined by a DNN to form the specification estimations. The simulation results validate the proposed approach in terms of testing accuracy and cost.

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Publication Details

Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Published
2024-11-20
DOI
https://doi.org/10.1109/tvlsi.2024.3496777
Citations
3
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
1.47

Funders

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article

Deep Learning-Based Performance Testing for Analog Integrated Circuits

Chongtao Guo, Geoffrey Ye Li, Houjun Wang, Hao Li et al.
3 citations
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
VLSI and Analog Circuit Testing
1.47
article

Deep Learning-Based Performance Testing for Analog Integrated Circuits

Chongtao Guo, Geoffrey Ye Li, Houjun Wang, Hao Li, Jiawei Cao, Zhigang Wang
article en
3 citations

Abstract

In this brief, we propose a deep learning-based performance testing framework to minimize the number of required test modules while guaranteeing the accuracy requirement, where a test module corresponds to a combination of one circuit and one stimulus. First, we apply a deep neural network (DNN) to establish the mapping from the response of the circuit under test (CUT) in each module to all specifications to be tested. Then, the required test modules are selected by solving a 0–1 integer programming problem. Finally, the predictions from the selected test modules are combined by a DNN to form the specification estimations. The simulation results validate the proposed approach in terms of testing accuracy and cost.

IEEE Transactions on Very Large Scale Integration (VLSI) SystemsVol. 33(4)
University of Electronic Science and Technology of China (CN), Shenzhen University (CN), Imperial College London (GB)
National Natural Science Foundation of China, China Postdoctoral Science Foundation, Natural Science Foundation of Sichuan Province
Affordable and clean energy
Openalex Percentile: Top 16%
VLSI and Analog Circuit Testing
1.47
DOISourceOpenAlex
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Deep Learning-Based Performance Testing for Analog Integrated Circuits — Chongtao Guo, Geoffrey Ye Li, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2024) | TGRS Research Map | TGRS