On the Modeling of Inverse Memristor With Completely Explicit Memory Description: A Memorized Dielectric Relaxation Analogy‐Based Approach

ABSTRACT In this work, a memorized dielectric relaxation analogy‐based model of inverse memristor has been proposed. In contrast to the previous models, a completely explicit memory description of the inverse memristor can be achieved by ours. The proposed model has been found to be well applicable to the practical inverse memristors of both current and voltage‐controlled types where the basic properties of inverse memristor have been preserved and the strong agreements between the model‐based results and their circuit‐based benchmarks can be observed. Based on our model, a rigorous analysis of inverse memristor has been performed to give a mathematical discussion on the simulation results. The power and energy consumption aspects have also been analyzed. In addition, the effect of parasitic element has been explored and it has been found that the inverse memristor realized based on our model is more robust to such undesired effect than those realized based on the others. This is another virtue of the proposed model. The realization methodology of the inverse memristor circuit based on our model with off‐the‐shelf components and the extension of the model toward the inverse memcapacitor and inverse meminductor have also been given.