Design and implementation of CNFET-based universal bi-quad filter and quadrature oscillator utilizing innovative floating current source (IFCS)
• Innovative CNFET-based Design: Developed a voltage-mode Universal Bi-quad Filter (UBF) and Quadrature Oscillator (QO) using Carbon Nanotube Field Effect Transistor (CNFET) technology, emphasizing scalability, low power dissipation, and superior performance. • Multifunctional Filter Capabilities: The UBF supports low-pass, high-pass, band-pass, and band-stop responses with independent electrical tunability of natural frequency and quality factor. • Compact and Efficient Topology: The designs utilize only two Innovative Floating Current Sources (IFCS) and grounded capacitors, ensuring compactness, high input impedance, and efficient IC integration. • Self-Regulating Quadrature Oscillator: A QO derived from the UBF design offers self-regulated control over oscillation frequency and amplitude, achieving higher frequencies compared to CMOS-based OTAs. • Power Efficiency and Compactness: The design demonstrates power consumption 6000 times lower than silicon CMOS (32 nm), with reduced chip dimensions and electronic adjustability for real-world applications. This study presents, simulation study and a design of voltage mode Universal Bi-quad Filter (UBF) and a Quadrature Oscillator (Q O ) based Innovative Floating Current Source (IFCS) using Carbon nanotube field effect transistor (CNFET) transistor technology. The technique here described takes advantage of the intrinsic features-a scalability, a low power dissipation has the range of the supplied voltages is ±0.1 V and outstanding performances-of CNFET devices to implement both the topologies of UBF and Q O . The UBF has been designed in order to guarantee a large number of filtering responses, namely, (low-pass, high-pass, band-pass, and band-stop), all tunable electrically with respect to the natural frequency and quality factor. The Q O has been obtained from the UBF by modifying it in such a way as to get self-regulated control on the oscillation frequency and amplitude. This design focuses on power efficiency while keeping performance high, thus enabling it for integration in a monolithic integrated circuit. The suggested CNTFET-IFCS demonstrates power consumption that is 6000 times lower than silicon CMOS semiconductors using 32 nm transistor parameter, along with a substantial decrease in chip dimension. All simulations were conducted utilizing Cadence Virtuoso tools.
Authors
- Zaidoon Khalaf Mahmood
- Arsen Ahmed Mohammed (ORCID: https://orcid.org/0000-0003-2239-9940)
- Ahmed Burhan Mohammed (ORCID: https://orcid.org/0000-0003-4326-0120)
Institutions
- University of Kirkuk (IQ)
Publication Details
- Journal
- Results in Engineering
- Published
- 2024-11-20
- DOI
- https://doi.org/10.1016/j.rineng.2024.103467
- Citations
- 5
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 1.04