Hafnia-Based Ferroelectric Transistor with Poly-Si Gates for Gate-First Three-Dimensional NAND Structures
Ferroelectric transistors based on hafnia-based ferroelectrics have emerged as promising candidates for next-generation memory devices. Additionally, hafnia-based ferroelectric transistors are suggested for three-dimensional (3D) memory devices, such as 3D ferroelectric NAND. This paper investigates the utilization of poly-Si as a gate material for hafnia-based ferroelectric transistors in 3D NAND structures. Conventional gate materials, such as TiN or W, are usually deposited in 3D NAND structures by using the gate-last process, which requires an additional gate replacement process. We demonstrate that poly-Si can be used as a gate material for hafnia-based ferroelectric transistors. We show that the 3D ferroelectric NAND based on the poly-Si gate can be fabricated by a simpler gate-first process without requiring a gate replacement process. Our findings underscore the potential of poly-Si as a gate material for ferroelectric transistors and 3D ferroelectric NAND.
Authors
- Ik‐Jyae Kim (ORCID: https://orcid.org/0000-0002-7560-6811)
- Jang‐Sik Lee (ORCID: https://orcid.org/0000-0002-1096-1783)
- Jiwoung Choi
Institutions
- Pohang University of Science and Technology (KR)
Publication Details
- Journal
- ACS Applied Materials & Interfaces
- Published
- 2024-11-20
- DOI
- https://doi.org/10.1021/acsami.4c17210
- Citations
- 1
- Primary Topic
- Ferroelectric and Negative Capacitance Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.21
Funders
- National Research Foundation of Korea
- Samsung
- Korea Evaluation Institute of Industrial Technology