An improved switch‐capacitor based 13‐level inverter topology with reduced device count and lower TSV

Abstract An improved dual‐source SC‐MLI topology is developed in this article for medium‐voltage and high‐power applications. This topology can perform symmetrically and asymmetrically to generate 9 levels and 13 levels, respectively. It consists of 10 unidirectional switches, a dual DC source, and two capacitors to provide high‐gain output voltage with lower TSV. Since the capacitor's voltages are self‐balanced, therefore no need for an auxiliary circuit or sensors, which brings down the complexity of the circuit. To check the viability of the proposed topology, a simple and fundamental control strategy based on nearest‐level pulse width modulation is opted for. From the comparative analysis, it was observed that the proposed topology outperformed similar topologies in terms of switch counts, cost factor, power quality, and total standing voltage. The proposed topology's feasibility is evaluated using MATLAB/Simulink under both static and dynamic loads. Furthermore, a thermal analysis is conducted in PLECS software to calculate the losses across the components and consecutively the efficiency of the proposed circuit. It has been found that the proposed topology can generate 9 levels and 13 levels while having an efficiency of over 96% in symmetric and asymmetric configurations, respectively. Finally, the simulation results are verified by using the experimental prototype to validate the performance of the improved circuit under different loading conditions.