VLSI Implementation of Stochastic MAC Unit for 2D Convolution

The growth of deep learning applications has increased the demand for effective and high-performance neural network accelerators. With it's high bit error tolerance, stochastic computing (SC) presents a viable substitute for binary arithmetic in a variety of computation-intensive applications, such as Convolutional Neural Networks (CNNs). The Multiplication and Accumulation (MAC) unit helps in maintaining accuracy and reducing power consumption. The proposed method with the help of a Stochastic number generator (SNG), MAC unit, Max pooling layer, Rectified linear unit (ReLU) and fully connected layer has build a complete architecture. The MAC unit effectively computes convolutional operations with lower precision requirements by utilizing stochastic computation methods, which results in considerable power savings. The MAC Unit achieved a delay of 12.13 ns when compared to the conventional unit of 13.45 ns, also the LUT Utilization of the proposed unit was 280 while for the conventional unit was 295. So finally, this stochastic computing-based ReLU unit achieved an accuracy of 98.3% compared to the existing method, an accuracy of 92 % using the Modified National Institute of Standards and Technology (MNIST) data set.