Low Power Single Cycle RISC V Processor for Biomedical Applications

Edge computing has become the preferred choice over cloud computation due to the growing popularity of the Internet of Things (loT). However, the scarcity of resources at the periphery presents a significant obstacle, especially in terms of energy efficiency. This problem poses a significant barrier to the expansion of edge computing devices. Power consumption is of utmost importance in applications such as wearable technology and health monitoring systems. Using intricate, pipelined, versatile processors in these inexpensive applications is not efficient. It leads to an excessive consumption of power. As a result, edge computing systems demand solutions that are minimal in power consumption yet still capable of delivering enough performance output. The purpose of our study is to introduce a power-efficient RV321M processor that utilises a single-cycle RISC-V Instruction set architecture (ISA). This processor is tailored specifically for biomedical-based edge nodes with limited resources. The comparison result indicates that the proposed architecture has a power consumption of 0.09 mW/MHz with an area of 0.24 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>and is most suitable for low-end or wearable biomedical applications.