Suppression of Capacitor Leakage Through Thermal Budget Control in DRAM With ZrO ₂ -Based Dielectrics

As the DRAM devices continue to scale down, the leakage current of the capacitors is having a significant impact on DRAM operation. We have analyzed the factors that significantly affect the leakage current of DRAM capacitors and improved the leakage current accordingly. In this research, we modeled the degradation of the ZrO2-based dielectric layer due to subsequent high-temperature processes in back-end-of-line (BEOL) processes after forming the Metal-Insulator–Metal (MIM) capacitor in DRAM from two perspectives, and we developed a low-temperature process and verified the validity of these models. We introduced two models for the degradation of the dielectric film caused by high-temperature processes. First, a band gap decreases due to the loss of oxygen in the dielectric material ZrO2. The interface between the ZrO2 dielectric layer and the TiN top electrode was simulated, and through XPS analysis of the ZrO2 layer, it was confirmed that the oxygen defects induced in ZrO2 by the high-temperature process reduce the Schottky barrier, resulting in an increase in leakage current. Second, another cause was the degradation of surface roughness due to the crystallization of the dielectric film. The XRD analysis results show that ZrO2 is crystallized at a processing temperature of 500°C, and the deterioration of surface roughness in the crystallized region can be confirmed through AFM analysis. In addition, partial crystallization patterns occurring during high-temperature processing can also be seen in TEM images. Ultimately, based on these two models, we confirmed that capacitor leakage in actual devices was improved by the BEOL low-temperature process, and this approach provides crucial insight for the continued scaling of DRAM capacitors.