An 88.5 fs_rms Integrated Jitter and −76.2 dBc Reference Spur mmW PLL Utilizing a Ripple Compensation Phase/Frequency Detector

Millimeter-wave (mmW) phase-locked loops (PLLs) typically favor a wide loop bandwidth for stronger suppression of the out-of-band phase noise from a voltage-controlled oscillator (VCO). Unfortunately, doing so lowers the degree of attenuation to the PLL reference spurs. This paper proposes a ripple compensation phase detector (RCPD) for extending PLL loop bandwidth and phase noise suppression without sacrificing reference spur performance. The RCPD inherently consists of a pair of PDs that generate respective ripple simultaneously, with each PD’s ripple current compensating the other, resulting in a glitch-free RCPD output. A calibrator is also introduced to reduce device mismatches. With the proposed techniques, the proposed mmW PLL was implemented using 22 nm bulk CMOS technology. The mmW PLL operates from 32.7 to 39.4 GHz, achieving an integrated jitter and reference spur of 88.5 fsrms (1 kHz to 100 MHz) and –76.2 dBc, respectively, with a figure-of-merit (FoM) of –247.5 dB.