A new 13N-complexity memory built-in self-test algorithm to balance static random access memory static fault coverage and test time

As memories dominate the system-on-chip (SoC), their quality significantly impacts the chip manufacturing yield. There is a growing need to reduce the chip production time and cost, which mainly depends on the testing phase. Hence, a memory built-in self-test (MBIST) utilizing a low-complexity, high-fault-coverage test algorithm is essential for efficient and thorough memory testing. The March AZ1 algorithm, with 13N complexity, was created earlier to balance the test length and fault coverage. However, poor positioning of a write operation in its test sequence caused the reduction of the transition coupling fault (CFtr) detection. This paper presents the creation of the March AZ algorithm, modified from the March AZ1 algorithm, to increase CFtr coverage while preserving the same complexity. It was accomplished by analyzing the fault coverage offered by the March AZ1 algorithm and then reorganizing its test sequence to address the limitation in detecting CFtr. The newly produced March AZ1 algorithm was successfully implemented in an MBIST controller. The simulation tests validated its functionality and demonstrated that the CFtr coverage was enhanced from 62.5% to 75%, achieving an overall fault coverage of 83.3%. Therefore, with 13N complexity, it offers the best fault coverage among all the existing test algorithms with a complexity below 18N.

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Publication Details

Journal
International Journal of Power Electronics and Drive Systems/International Journal of Electrical and Computer Engineering
Published
2024-11-18
DOI
https://doi.org/10.11591/ijece.v15i1.pp163-173
Citations
1
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
0.49

Funders

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article

A new 13N-complexity memory built-in self-test algorithm to balance static random access memory static fault coverage and test time

Mohd Syafiq Mispan, Razaidi Hussin, Aiman Zakwan Jidin, Lee Weng Fook
1 citations
International Journal of Power Electronics and Drive Systems/International Journal of Electrical and Computer Engineering
VLSI and Analog Circuit Testing
0.49
article

A new 13N-complexity memory built-in self-test algorithm to balance static random access memory static fault coverage and test time

Mohd Syafiq Mispan, Razaidi Hussin, Aiman Zakwan Jidin, Lee Weng Fook
article en
1 citations

Abstract

As memories dominate the system-on-chip (SoC), their quality significantly impacts the chip manufacturing yield. There is a growing need to reduce the chip production time and cost, which mainly depends on the testing phase. Hence, a memory built-in self-test (MBIST) utilizing a low-complexity, high-fault-coverage test algorithm is essential for efficient and thorough memory testing. The March AZ1 algorithm, with 13N complexity, was created earlier to balance the test length and fault coverage. However, poor positioning of a write operation in its test sequence caused the reduction of the transition coupling fault (CFtr) detection. This paper presents the creation of the March AZ algorithm, modified from the March AZ1 algorithm, to increase CFtr coverage while preserving the same complexity. It was accomplished by analyzing the fault coverage offered by the March AZ1 algorithm and then reorganizing its test sequence to address the limitation in detecting CFtr. The newly produced March AZ1 algorithm was successfully implemented in an MBIST controller. The simulation tests validated its functionality and demonstrated that the CFtr coverage was enhanced from 62.5% to 75%, achieving an overall fault coverage of 83.3%. Therefore, with 13N complexity, it offers the best fault coverage among all the existing test algorithms with a complexity below 18N.

International Journal of Power Electronics and Drive Systems/International Journal of Electrical and Computer EngineeringVol. 15(1)
Technical University of Malaysia Malacca (MY), Emerald Education Systems (US), Universiti Malaysia Perlis (MY)
Universiti Malaysia Perlis, Universiti Teknikal Malaysia Melaka
Openalex Percentile: Top 35%
VLSI and Analog Circuit Testing
0.49
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