Low-cost FPGA-based multi-channel TDC with high resolution and density for time-of-flight detectors

Abstract The Time-to-Digital Converter (TDC) is widely used for precise time interval measurements and play a critical role in Time-of-Flight (ToF) applications. In this paper, we present the design of a 64-channel leading-edge and trailing-edge TDC based on a Field-Programmable Gate Array (FPGA). This TDC is implemented on a Xilinx Kintex-7 XC7K410T-2FFG900I FPGA and consists of modules including a coarse counter, pulse generator, tapped delay line, decomposition encoder, and calibrator. To better evaluate its performance, we designed a multi-channel hardware verification board. According to laboratory test results, the timing precision has a root mean square (RMS) value of 6.69 ps, and a least significant bit (LSB) of 2.99 ps. The experimental results confirm that our TDC design achieves excellent timing precision.

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Publication Details

Journal
Journal of Instrumentation
Published
2024-11-01
DOI
https://doi.org/10.1088/1748-0221/19/11/c11008
Primary Topic
Advancements in PLL and VCO Technologies
Type
article
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article

Low-cost FPGA-based multi-channel TDC with high resolution and density for time-of-flight detectors

Chengxin Zhao, Wenchao Sun, Yun Fu Zhao, Chao‐Jie Zou et al.
Journal of Instrumentation
Advancements in PLL and VCO Technologies
article

Low-cost FPGA-based multi-channel TDC with high resolution and density for time-of-flight detectors

Chengxin Zhao, Wenchao Sun, Yun Fu Zhao, Chao‐Jie Zou, Xinpeng Wang, Shikai Wang, Haibo Yang, Yangzhou Su, Xiaolin Xia
article en

Abstract

Abstract The Time-to-Digital Converter (TDC) is widely used for precise time interval measurements and play a critical role in Time-of-Flight (ToF) applications. In this paper, we present the design of a 64-channel leading-edge and trailing-edge TDC based on a Field-Programmable Gate Array (FPGA). This TDC is implemented on a Xilinx Kintex-7 XC7K410T-2FFG900I FPGA and consists of modules including a coarse counter, pulse generator, tapped delay line, decomposition encoder, and calibrator. To better evaluate its performance, we designed a multi-channel hardware verification board. According to laboratory test results, the timing precision has a root mean square (RMS) value of 6.69 ps, and a least significant bit (LSB) of 2.99 ps. The experimental results confirm that our TDC design achieves excellent timing precision.

Journal of InstrumentationVol. 19(11)
Chinese Academy of Sciences (CN), Institute of Modern Physics (CN), University of Chinese Academy of Sciences (CN), Northwest Normal University (CN)
Openalex Percentile: Top 82%
Advancements in PLL and VCO Technologies
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Low-cost FPGA-based multi-channel TDC with high resolution and density for time-of-flight detectors — Chengxin Zhao, Wenchao Sun, et al. · Journal of Instrumentation (2024) | TGRS Research Map | TGRS