Exploiting neural networks bit-level redundancy to mitigate the impact of faults at inference

Abstract Neural networks are widely used in critical environments such as healthcare, autonomous vehicles, or video surveillance. To ensure the safety of the systems that rely on their functionality, it is essential to validate their correct behaviour in the presence of faults. This paper studies the behaviour of state-of-the-art neural network models with fault injection in their weights. For this purpose, we analyse the sensitivity of these models and identify the impact of bit flips on their accuracy. To mitigate the effects of faults, we introduce two mechanisms that leverage bit-level redundancy for protection. The first mechanism, Fixed Protection , safeguards consecutive sets of bits, while the second, Variable Protection , targets non-consecutive bits. Our findings demonstrate that, on average, random bit flip faults cause the accuracy of the original models to drop by 1.3% to over 3%. However, with our protection mechanisms in place, accuracy reductions are significantly minimised, ranging from only 0.0001% to 0.4%.

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Publication Details

Journal
The Journal of Supercomputing
Published
2024-11-15
DOI
https://doi.org/10.1007/s11227-024-06693-7
Citations
6
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
1.25

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article

Exploiting neural networks bit-level redundancy to mitigate the impact of faults at inference

José Flich, Carles Hernández, Izan Catalán Gallach
6 citations
The Journal of Supercomputing
Integrated Circuits and Semiconductor Failure Analysis
1.25
article

Exploiting neural networks bit-level redundancy to mitigate the impact of faults at inference

José Flich, Carles Hernández, Izan Catalán Gallach
article en
6 citations

Abstract

Abstract Neural networks are widely used in critical environments such as healthcare, autonomous vehicles, or video surveillance. To ensure the safety of the systems that rely on their functionality, it is essential to validate their correct behaviour in the presence of faults. This paper studies the behaviour of state-of-the-art neural network models with fault injection in their weights. For this purpose, we analyse the sensitivity of these models and identify the impact of bit flips on their accuracy. To mitigate the effects of faults, we introduce two mechanisms that leverage bit-level redundancy for protection. The first mechanism, Fixed Protection , safeguards consecutive sets of bits, while the second, Variable Protection , targets non-consecutive bits. Our findings demonstrate that, on average, random bit flip faults cause the accuracy of the original models to drop by 1.3% to over 3%. However, with our protection mechanisms in place, accuracy reductions are significantly minimised, ranging from only 0.0001% to 0.4%.

The Journal of SupercomputingVol. 81(1)
Universitat Politècnica de València (ES)
Universitat Politècnica de València
Peace, Justice and strong institutions
Openalex Percentile: Top 20%
Integrated Circuits and Semiconductor Failure Analysis
1.25
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