Enhanced Readout Reliability in Phase Change Memory with a Dual-Sensing-Margin Offset-Compensated Sense Amplifier

Phase change memory (PCM) is considered one of the most promising candidates for next-generation non-volatile memory, owing to its scalability, durability, and cost-effectiveness. However, with the shrinking of device sizes and the reduction in supply voltages, achieving high-speed and reliable readouts in PCM has become increasingly challenging due to process variations. To address this, the dual-sensing-margin offset-compensated sense amplifier (DSOC-SA) is proposed. The DSOC-SA achieves the highest sensing margin, and the lowest read energy consumption compared to traditional sense amplifiers by utilizing a dual-sensing-margin structure, offset compensation, and strong positive feedback. Simulation results demonstrate that, compared to differential sense amplifier and offset-canceling current-sampling sense amplifier, DSOC-SA achieves a 5.6× and 1.6× improvement in sensing speed, respectively, while reducing power consumption by 87.1% and 51.2%.