Darwin: A DRAM-Based Multi-Level Processing-in-Memory Architecture for Column-Oriented Database

We propose Darwin, a practical LRDIMM-based multi-level Processing-in-memory (PIM) architecture for data analytics, which exploits the internal bandwidth of DRAM using the bank-, bank group-, chip-, and rank-level parallelisms. Considering the properties of data analytics operators and DRAM's area constraints, Darwin maximizes the internal bandwidth by placing the PIM processing units, buffers, and control circuits across the hierarchy of DRAM. Darwin supports a novel PIM instruction architecture that concatenates instructions for multiple thread executions on bank group processing entities, addressing the command bottleneck by enabling separate control of up to 512 different in-memory processing units simultaneously. We build a cycle-accurate simulation framework to evaluate Darwin with various DRAM configurations, optimization schemes and workloads. Darwin achieves up to 14.7× speedup over the non-optimized version, leveraging many optimization schemes. Darwin architecture achieves 4.0 × −43.9× higher throughput and reduces energy consumption by 85.7% than the baseline CPU system (Intel Xeon Gold 6226 + 4 channels of DDR4-2933) for essential data analytics operators. Compared to the state-of-the-art PIM, Darwin achieves up to 7.5× and 7.1× in the basic query operators and TPC-H queries, respectively. Darwin in GDDR6 configuration requires only 5.6% area overhead, suggesting a promising PIM solution for the future main memory system.

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Publication Details

Journal
IEEE Transactions on Emerging Topics in Computing
Published
2024-11-13
DOI
https://doi.org/10.1109/tetc.2024.3493132
Primary Topic
Advanced Data Storage Technologies
Type
article
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article

Darwin: A DRAM-Based Multi-Level Processing-in-Memory Architecture for Column-Oriented Database

Haerang Choi, Wontak Han, Yongkee Kwon, Jaeyoung Kim et al.
IEEE Transactions on Emerging Topics in Computing
Advanced Data Storage Technologies
article

Darwin: A DRAM-Based Multi-Level Processing-in-Memory Architecture for Column-Oriented Database

Haerang Choi, Wontak Han, Yongkee Kwon, Jaeyoung Kim, Joo-Young Kim, Donghyuk Kim, Jongsoon Won
article en

Abstract

We propose Darwin, a practical LRDIMM-based multi-level Processing-in-memory (PIM) architecture for data analytics, which exploits the internal bandwidth of DRAM using the bank-, bank group-, chip-, and rank-level parallelisms. Considering the properties of data analytics operators and DRAM's area constraints, Darwin maximizes the internal bandwidth by placing the PIM processing units, buffers, and control circuits across the hierarchy of DRAM. Darwin supports a novel PIM instruction architecture that concatenates instructions for multiple thread executions on bank group processing entities, addressing the command bottleneck by enabling separate control of up to 512 different in-memory processing units simultaneously. We build a cycle-accurate simulation framework to evaluate Darwin with various DRAM configurations, optimization schemes and workloads. Darwin achieves up to 14.7× speedup over the non-optimized version, leveraging many optimization schemes. Darwin architecture achieves 4.0 × −43.9× higher throughput and reduces energy consumption by 85.7% than the baseline CPU system (Intel Xeon Gold 6226 + 4 channels of DDR4-2933) for essential data analytics operators. Compared to the state-of-the-art PIM, Darwin achieves up to 7.5× and 7.1× in the basic query operators and TPC-H queries, respectively. Darwin in GDDR6 configuration requires only 5.6% area overhead, suggesting a promising PIM solution for the future main memory system.

IEEE Transactions on Emerging Topics in ComputingVol. 13(3)
SK Group (United States) (US), Korea Advanced Institute of Science and Technology (KR)
Openalex Percentile: Top 77%
Advanced Data Storage Technologies
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Darwin: A DRAM-Based Multi-Level Processing-in-Memory Architecture for Column-Oriented Database — Haerang Choi, Wontak Han, et al. · IEEE Transactions on Emerging Topics in Computing (2024) | TGRS Research Map | TGRS