A wideband front-end with integrated high-voltage assisted input buffer for high-speed ADC

This letter presents an integrated high-voltage assisted high-linearity wideband front end for high-speed analog-to-digital converters (ADCs). The on-chip high-voltage generation provides high-swing current injection, which effectively improves flatness within the bandwidth and power supply fluctuation suppression for input buffer. Additionally, modeling and analysis of the front end matching network, along with the inclusion of inductive compensation, increased the bandwidth by 3.1GHz compared to traditional structures. Using 28nm CMOS technology, the front end achieves an SNDR of 56.21dB and an SFDR of 67.48dBc with a FoMs of 163.7dB at a 6GHz input.

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Publication Details

Journal
IEICE Electronics Express
Published
2024-11-13
DOI
https://doi.org/10.1587/elex.21.20240640
Citations
2
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
0.37

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article

A wideband front-end with integrated high-voltage assisted input buffer for high-speed ADC

Hanbo Jia, Kai Sun, Xuan Guo, Danyu Wu et al.
2 citations
IEICE Electronics Express
Analog and Mixed-Signal Circuit Design
0.37
article

A wideband front-end with integrated high-voltage assisted input buffer for high-speed ADC

Hanbo Jia, Kai Sun, Xuan Guo, Danyu Wu, Shuangbao Jia, Heping Ma, Xinyu Liu, Zilin Jiang
article en
2 citations

Abstract

This letter presents an integrated high-voltage assisted high-linearity wideband front end for high-speed analog-to-digital converters (ADCs). The on-chip high-voltage generation provides high-swing current injection, which effectively improves flatness within the bandwidth and power supply fluctuation suppression for input buffer. Additionally, modeling and analysis of the front end matching network, along with the inclusion of inductive compensation, increased the bandwidth by 3.1GHz compared to traditional structures. Using 28nm CMOS technology, the front end achieves an SNDR of 56.21dB and an SFDR of 67.48dBc with a FoMs of 163.7dB at a 6GHz input.

IEICE Electronics ExpressVol. 21(24)
Chinese Academy of Sciences (CN), Institute of Semiconductors (CN), University of Chinese Academy of Sciences (CN)
National Natural Science Foundation of China
Affordable and clean energy
Openalex Percentile: Top 42%
Analog and Mixed-Signal Circuit Design
0.37
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A wideband front-end with integrated high-voltage assisted input buffer for high-speed ADC — Hanbo Jia, Kai Sun, et al. · IEICE Electronics Express (2024) | TGRS Research Map | TGRS