D-Band meets FinFET: Fully-Integrated Transmitter and Receiver Architectures for 100+Gb/s Links

This paper highlights recent D-Band (110-170 GHz) transmitter (TX) and receiver (RX) architectures which achieve 100+ Gb/s data rates. Such high data rates are achieved with efficiencies < 2 pJ/b while also integrating key building blocks required for end-to-end system - DAC, ADC, PLL. The TX employs a direct-conversion RF-DAC architecture and generates a 140 GHz LO signal from a 5.83 GHz input reference. It achieves peak data rates of 80/160 Gb/s (QPSK/16QAM) with an EVM of 17.9 dB and 1pJb efficiency at 160 Gb}/s. The RX integrates a direct-conversion architecture with wideband baseband, an LO gen identical to the TX, and a high-speed ADC. It achieves a peak data rate of 128 Gb/ with -15.2 dB EVM and 1.95pJ/b efficiency.