A 132-204 GHz Carrier Storage Frequency Divider with sub-50 Micro-Watt DC Power

This paper presents a frequency divider by utilizing the carrier storage property in silicon PIN diodes. PIN diodes undergo reverse recovery under a large-signal RF drive. The proposed design utilizes this property and drives the diode into reverse recovery once in two cycles of RF input in order to generate a divide-by-two output. The circuit consumes near zero DC power since the diode is reverse-biased during division operation. Implemented in GlobalFoundries 90nm SiGe BiCMOS process, the proposed divider has a division range spanning 132 GHz to 204 GHz for an input signal of <-1 dBm and consumes 42 μW DC power. Experimental results show minor phase noise degradation upon division. This is the first demonstration of a carrier storage PIN diode divider in silicon. This work performs frequency division at the highest input frequency among all reported silicon-based dividers.

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Publication Details

Published
2024-10-27
DOI
https://doi.org/10.1109/bcicts59662.2024.10745719
Citations
2
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.42

Funders

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article

A 132-204 GHz Carrier Storage Frequency Divider with sub-50 Micro-Watt DC Power

Sidharth Thomas, Aydin Babakhani, Benyamin Fallahi Motlagh
2 citations
Radio Frequency Integrated Circuit Design
0.42
article

A 132-204 GHz Carrier Storage Frequency Divider with sub-50 Micro-Watt DC Power

Sidharth Thomas, Aydin Babakhani, Benyamin Fallahi Motlagh
article en
2 citations

Abstract

This paper presents a frequency divider by utilizing the carrier storage property in silicon PIN diodes. PIN diodes undergo reverse recovery under a large-signal RF drive. The proposed design utilizes this property and drives the diode into reverse recovery once in two cycles of RF input in order to generate a divide-by-two output. The circuit consumes near zero DC power since the diode is reverse-biased during division operation. Implemented in GlobalFoundries 90nm SiGe BiCMOS process, the proposed divider has a division range spanning 132 GHz to 204 GHz for an input signal of <-1 dBm and consumes 42 μW DC power. Experimental results show minor phase noise degradation upon division. This is the first demonstration of a carrier storage PIN diode divider in silicon. This work performs frequency division at the highest input frequency among all reported silicon-based dividers.

University of California, Los Angeles (US)
GlobalFoundries
Affordable and clean energy
Openalex Percentile: Top 37%
Radio Frequency Integrated Circuit Design
0.42
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