Investigation of Self-Heating Effect on the Void Embedded SOI MOSFETs

Self-heating effect (SHE) in void embedded SOI (VESOI) MOSFET is analyzed using 3D finite-element method (FEM) to solve modified Fourier heat conduction equations. The induced void beneath the silicon channel results in a 42% increase in peak lattice temperature compared to the SOI MOSFET. The impacts of related device geometry and process fluctuation are investigated to provide guidelines for mitigating the self-heating effect in device design, as the scaling-down of the device. The results indicate that the embedded void has a significant impact on device lattice temperature. To efficiently and accurately describe the transient thermal response of the VESOI MOSFET, a SPICE-based thermal RC network is established, achieving an acceleration of over 8000 times. Additionally, a void-length-dependent RC thermal network model is developed with a prediction error less than 1.4%. The proposed model can be utilized to predict the lattice temperature of VESOI MOSFETs with varying void lengths both in steady and transient practical application.