Single Ended Read Decoupled High Stable 9T CNTFET SRAM for Low Power Applications
ABSTRACT In wireless sensor networks, conserving power is vital for prolonging battery life. This research introduces a groundbreaking solution: a 9T carbon nanotube‐field effect transistor (CNTFET) based SRAM cell (9T SRAM) designed to optimize power consumption and stability. Through meticulous analysis, the performance of this 9T SRAM cell is quantified. Power consumption metrics reveal impressive figures: the write, hold, read, and dynamic power are measured at 0.21 nW, 0.32 nW, 15.28 μW, and 8.09 μW, respectively. Furthermore, the Write SNM (WSNM), Hold SNM (HSNM), and Read SNM (RSNM) are found to be 380.11, 390.22, and 390.31 mV, respectively, indicating robust stability. The proposed bit cell has a write and read delay of 95.1 and 39.6 pS, respectively. Incorporating stacked transistors diminishes power consumption, while the decoupled read technique boosts the stability of the proposed bit cell. By comparing these results with existing SRAM cells, the superiority of the proposed 9T SRAM cell in terms of power efficiency becomes evident. Notably, it outperforms earlier models, making it an ideal candidate for integration into wireless sensor networks. These findings are supported by simulations conducted using HSPICE, alongside a 32 nm CNTFET model sourced from Stanford University.
Authors
- E. Mani (ORCID: https://orcid.org/0000-0002-6318-0286)
- Mohamed Sharaf
- Mohammed El‐Meligy
- E. Akash
Institutions
- National Institute of Technology Tiruchirappalli (IN)
- Applied Science Private University (JO)
- Jadara University (JO)
- King Saud University (SA)
- Sri Eshwar College of Engineering
Publication Details
- Journal
- International Journal of Numerical Modelling Electronic Networks Devices and Fields
- Published
- 2024-11-01
- DOI
- https://doi.org/10.1002/jnm.3318
- Citations
- 5
- Primary Topic
- Low-power high-performance VLSI design
- Type
- article
- Field-Weighted Citation Impact
- 1.04
Funders
- King Saud University