Design of Cascode Current Mirror using CMOS Technology for Low Power Application

Background: Many applications, including biological applications, require a very high output impedance current mirror because they run at very low voltages. The circuit known as the current mirror applies the idea that two identical MOS transistors with the same gate-source voltage will have equal channel currents flowing through them. Objective: The objective of this study is to optimize the design to minimize power consumption while maintaining accurate current mirroring, which is crucial for low-power and energy-efficient electronic systems. Methods: This study is performed in Cadence Virtuoso using the gdpk45 technology node to construct a cascode current mirror, comparing simulation findings to other contemporary mirrors. Results: A significant improvement in power usage is shown in comparison to other types of current mirrors, and a small signal model analysis of the circuit, the design, and its mathematical model is investigated. Conclusion: Compared to the circuits that were previously designed, the output resistance values are substantially greater. The cascode current mirror that is suggested in this paper uses 48 μW of electricity, while the other cascode current mirror uses 74.186 μW.