Method for the Real-Time Simulation of High Switching Frequency Power Electronic Converter Considering Switch Junction Capacitance

The high precision of the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$R_{\text {ON}}/R_{\text {OFF}}$ </tex-math></inline-formula> model makes it suitable for the real-time simulation of high switching frequency power electronic converters (HSFPECs). However, the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$R_{\text {ON}}/R_{\text {OFF}}$ </tex-math></inline-formula> model encounters two significant challenges: 1) neglecting the switching transient process introduces inaccuracies in simulations and 2) iterative operations when judging the switch status limit the switching frequency range. To address these issues, this article proposes an improved method that incorporates the effects of switch junction capacitance. The calculated amount is significantly reduced by constructing an equivalent state an equation without regarding junction capacitances as state variables and the switch status can be obtained by noniterative operations. Moreover, this method can ensure system stability by using backward Euler (BE) method and realizes the decoupling between the half-bridge arms, which greatly reduces the workload of judging the switch status for the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$R_{\text {ON}}/R_{\text {OFF}}$ </tex-math></inline-formula> model. Finally, the field-programmable gate array (FPGA) implementation scheme is presented, and an LLC resonant converter with a 30-ns simulation time step and a 250-kHz switching frequency is simulated on FPGAs. The results derived from the real-time simulation and hardware experiments corroborate the effectiveness and accuracy of the proposed method.