Doping- and capacitor-less 1T-DRAM cell using reconfigurable feedback mechanism

In this paper, we propose a doping- and capacitor-less 1T-DRAM cell, which achieved virtual doping by leveraging charge plasma and bias-induced electrostatic doping (bias-ED) techniques in a 5 nm-thick intrinsic silicon body, thereby eliminating doping processes. Platinum was in contact with the drain, while aluminum was in contact with the source, enabling virtual doping of the silicon body into a<i>p</i>*-<i>i-n</i>* configuration via the charge-plasma technique. Two coupled polarity gates and one control gate are positioned above the intrinsic channel region. The intrinsic channel region is virtually doped through the bias-ED by applying voltages to the gates, forming potential wells inside the channel. The voltage applied to the two coupled polarity gates determines whether the device operates in the<i>p</i>- or<i>n</i>-channel mode, whereas the control gate governs the flow of charge carriers. Charge carriers are stored and released in the potential wells inside the channel by adjusting the gate, effectively replacing the capacitor. In this device, the placement of polarity gates on either side of the control gate enables the observation of the reconfigurable characteristics. Moreover, the proposed device utilizes a feedback mechanism, enabling excellent memory characteristics such as a high on/off current ratio of ∼10⁹, steep switching behavior of ∼0.2<i>µ</i>V dec^-1, short write time of 10 ns, long hold retention of over 100 s, and long read retention of over 600 s.