Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectors

This paper presents the design and characteristics of a front-end readout system for silicon sensors used in nuclear spectroscopy studies. Furthermore, the study proposes circuit topologies that combine gain-boosting and class-AB techniques featuring a good performance regarding gain, accuracy, speed, linearity, and power consumption, meeting the stringent requirements of deep submicrometer CMOS technologies. The readout channel comprises a charge-sensitive amplifier with a tunable discharge time, pole-zero cancellation circuit, and first-order unipolar shaper with a peaking time of 90 ns. The building blocks are made up of single-stage op-amps, thus not requiring compensation. Furthermore, the circuit is optimized for a detector capacitance of 5 pF, and the noise performance is discussed. Experimental results in a 180 nm CMOS process and a supply voltage of ±0.9 V validate the designed front-end channel. The total area of the chip obtained was 0.028 mm 2 . The conversion gain was 3.1 mV/fC, and the system maintained linearity up to an input charge range of 150 fC with a maximum output swing of 460 mV and recovered to the baseline within 400 ns. The compact design and the power consumption of only 1.97 mW provided a feasible solution for current radiation detectors coupled to many highly dense electronic channels.