Impact of temperature sensitivity on dead channel junctionless FET for linearity and high frequency applications

Abstract The operational framework of upcoming electronic devices is under examination to identify substitutes for MOSFETs, aiming to decrease power densities and alleviate constraints on energy efficiency. In this context, we present and examine an innovative structural design approach for double gate Junctionless Field-Effect Transistors (DG-JLFETs). This approach provides benefits in terms of fabrication, performance, and design considerations. The dead channel DG-JLFET (DC-DGJLFET) is the name given to this proposed structure. The term ‘dead channel’ refers to the device’s mid-channel lack of conducting charge carriers caused by the P-type layer and lowers functional channel thickness ( <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" overflow="scroll"> <mml:mrow> <mml:mrow> <mml:msub> <mml:mi mathvariant="italic">t</mml:mi> <mml:mrow> <mml:mi>Si</mml:mi> </mml:mrow> </mml:msub> </mml:mrow> </mml:mrow> </mml:math> ) and enhances the device’s figures of merit. Here, the performance indicators of DC-DGJLFET is also analysed for a temperature range of (200 K–450 K) to calculate the radio frequency and linearity performances. Moreover, the suggested device exhibits superior linearity, particularly at elevated temperatures.