A New Back‐End‐Of‐Line Ferroelectric Field‐Effect Transistor Platform via Laser Processing

The discovery of ferroelectricity in hafnia-based materials has revitalized interest in realizing ferroelectric field-effect transistors (FeFETs) due to its compatibility with modern microelectronics. Furthermore, low-temperature processing by atomic layer deposition offers promise for realizing monolithic three-dimensional (M3D) integration toward energy- and area-efficient computing paradigms. However, integrating ferroelectrics with channel materials in FeFETs for M3D integration remains challenging due to the dual requirement of a high-quality ferroelectric-channel interface and low-power operation, all while maintaining back-end-of-line (BEOL)-compatible fabrication temperatures. Recent studies on 2D semiconductors and metal oxide channels highlight these challenges. Polycrystalline silicon (poly-Si), a channel material long integrated into the semiconductor industry, presents a promising alternative; however, its high fabrication temperature has hindered its applications to M3D integration. To overcome this challenge, we demonstrates a BEOL-compatible FeFET platform using poly-Si channels fabricated via locally-confined laser thermal processing and hafnia-based ferroelectrics by low-temperature atomic layer deposition with wafer-scale uniformity. The local nature of the laser processing mitigates the trade-off between the high-temperature crystallization for the quality of the interface and BEOL thermal budget constraints. The laser-processed FeFETs boast the largest effective memory widow for all BEOL-compatible FeFETs. Moreover, the fabricated FeFETs are integrated into wafer-scale synaptic arrays for neuromorphic computing, achieving record-high energy efficiency. Therefore, this work establishes a promising BEOL-compatible FeFET materials platform toward M3D integration.