Low‐temperature SOI SiGe/Si superlattice FinFET with omega‐shaped channel and self‐allied silicide for 3D sequential IC

Abstract In this letter, to improve the performance and reduce leakage currents of bulk low‐temperature multi‐layer SiGe/Si superlattice (SL) fin field‐effect transistors (FinFETs), a p ‐type omega‐shaped channel (Ω‐channel) SL FinFET is realized by etching a Si/Si 0.7 Ge 0.3 triple‐layer stacked structure in a replacement metal gate (RMG) module on a silicon‐on‐insulator (SOI) substrate. In addition, a self‐allied Ni 0.9 Pt 0.1 silicide process and a low‐thermal‐budget (≤400°C) integration procedure were performed on the Ω‐channel SL FinFET. Test results demonstrate that the on‐state current ( I on ) is increased by 5.5 times (from 78 to 429 µA/µm) and the off‐state current ( I off ) is reduced by 78.8% (from 5.2 × 10 −3 to 1.1 × 10 −3 µA/µm) when compared with the corresponding currents of traditional bulk SL FinFETs.

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Publication Details

Journal
Electronics Letters
Published
2024-11-01
DOI
https://doi.org/10.1049/ell2.70026
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
0.00

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article

Low‐temperature SOI SiGe/Si superlattice FinFET with omega‐shaped channel and self‐allied silicide for 3D sequential IC

Lei Cao, Qiu‐Yi Li, Xulei Qin, Yanzhao Wei et al.
Electronics Letters
Integrated Circuits and Semiconductor Failure Analysis
article

Low‐temperature SOI SiGe/Si superlattice FinFET with omega‐shaped channel and self‐allied silicide for 3D sequential IC

Lei Cao, Qiu‐Yi Li, Xulei Qin, Yanzhao Wei, Jiaxin Yao, Huaxiang Yin, Meizhi Zhang, Renjie Jiang, Guanqiao Sang, Junfeng Li, Qingzhu Zhang
article en

Abstract

Abstract In this letter, to improve the performance and reduce leakage currents of bulk low‐temperature multi‐layer SiGe/Si superlattice (SL) fin field‐effect transistors (FinFETs), a p ‐type omega‐shaped channel (Ω‐channel) SL FinFET is realized by etching a Si/Si 0.7 Ge 0.3 triple‐layer stacked structure in a replacement metal gate (RMG) module on a silicon‐on‐insulator (SOI) substrate. In addition, a self‐allied Ni 0.9 Pt 0.1 silicide process and a low‐thermal‐budget (≤400°C) integration procedure were performed on the Ω‐channel SL FinFET. Test results demonstrate that the on‐state current ( I on ) is increased by 5.5 times (from 78 to 429 µA/µm) and the off‐state current ( I off ) is reduced by 78.8% (from 5.2 × 10 −3 to 1.1 × 10 −3 µA/µm) when compared with the corresponding currents of traditional bulk SL FinFETs.

Electronics LettersVol. 60(21)
Changchun University of Science and Technology (CN), Beijing Institute of Technology (CN), Chinese Academy of Sciences (CN), Institute of Microelectronics (CN), University of Chinese Academy of Sciences (CN)
Department of Science and Technology of Jilin Province
Affordable and clean energy
Openalex Percentile: Top 82%
Integrated Circuits and Semiconductor Failure Analysis
DOIOpen Access PDFOpenAlex
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Low‐temperature SOI SiGe/Si superlattice FinFET with omega‐shaped channel and self‐allied silicide for 3D sequential IC — Lei Cao, Qiu‐Yi Li, et al. · Electronics Letters (2024) | TGRS Research Map | TGRS